HDLbits-Module add
Adder 1:module_add
You are given a module add16 that performs a 16-bit addition. Instantiate two of them to create a 32-bit adder. One add16 module computes the lower 16 bits of the addition result, while the second add16 module computes the upper 16 bits of the result, after receiving the carry-out from the first adder. Your 32-bit adder does not need to handle carry-in (assume 0) or carry-out (ignored), but the internal modules need to in order to function correctly. (In other words, the add16 module performs 16-bit a + b + cin, while your module performs 32-bit a + b).
您將獲得一個執(zhí)行 16 位加法的模塊 add16。實例化其中兩個以創(chuàng)建一個 32 位加法器。一個 add16 模塊計算加法結(jié)果的低 16 位,而第二個 add16 模塊在接收到第一個加法器的進位后計算結(jié)果的高 16 位。您的 32 位加法器不需要處理進位(假設(shè)為 0)或進位(忽略),但內(nèi)部模塊需要才能正常工作。(換句話說,add16 模塊執(zhí)行 16 位 a + b + cin,而您的模塊執(zhí)行 32 位 a + b)。

module top_module(
? ? input [31:0] a,
? ? input [31:0] b,
? ? output [31:0] sum
);
? ? wire cout1;
? ? ?add16? ins1( a[15:0],? b[15:0],? 1'b0, sum[15:0], cout1 );?
? ? ?add16? ins2( a[31:16],? b[31:16],? cout1, sum[31:16], );?
? ?
endmodule