RISC-V走向開放服務(wù)器規(guī)范
原文:RISC-V Moving Toward Open Server Specification作者:Agam Shah
轉(zhuǎn)載自:https://www.hpcwire.com/2023/07/24/risc-v-moving-toward-open-server-specification/
中文翻譯:
2023年7月24日
RISC-V International目前正在起草一份可以標(biāo)準(zhǔn)化RISC-V服務(wù)器芯片和系統(tǒng)開發(fā)的規(guī)范,RISC-V International是一個(gè)處理指令集架構(gòu)開發(fā)的組織。
該規(guī)范為基于RISC-V技術(shù)的各層服務(wù)器計(jì)算系統(tǒng)建立了標(biāo)準(zhǔn)接口。它可以幫助公司在云計(jì)算環(huán)境中部署RISC-V服務(wù)器,其中軟件通過虛擬化CPU運(yùn)行,而不是直接從硬件CPU運(yùn)行。
可以肯定的是,服務(wù)器規(guī)格還處于早期階段。當(dāng)前的迭代包括系統(tǒng)管理控制器、片上系統(tǒng)模塊、安全層、引導(dǎo)系統(tǒng)和虛擬化層。
RISC-V在一份定義該規(guī)范的文件中表示:“RISC-V服務(wù)器SoC(片上系統(tǒng))規(guī)范定義了一套標(biāo)準(zhǔn)化的功能,便攜式系統(tǒng)軟件(如操作系統(tǒng)和虛擬機(jī)管理程序)可以依賴這些功能存在于RISC-V服務(wù)器SoC中?!?/span>此處提供規(guī)范鏈接。

RISC-V是一個(gè)可免費(fèi)許可的指令集架構(gòu)。任何人都可以根據(jù)架構(gòu)創(chuàng)建芯片,但公司也可以添加其專有模塊并出售這些芯片。RISC-V得到了大多數(shù)頂級(jí)芯片制造商的支持,包括英特爾、AMD、蘋果、英偉達(dá)和高通。
開放計(jì)算項(xiàng)目還定義了x86和ARM服務(wù)器的類似規(guī)格,這些規(guī)格被服務(wù)器制造商用作構(gòu)建標(biāo)準(zhǔn)化數(shù)據(jù)中心產(chǎn)品的藍(lán)圖。
RISC-V提案還為服務(wù)器系統(tǒng)提供了基礎(chǔ),以支持CXL等技術(shù),CXL已經(jīng)得到了x86和ARM服務(wù)器制造商的支持。
即將推出的CXL 3.0規(guī)范在芯片、內(nèi)存和存儲(chǔ)之間提供了高速通信鏈路,并引起了服務(wù)器硬件制造商的興趣,因?yàn)樗赡軙?huì)改變數(shù)據(jù)中心的構(gòu)建方式。該規(guī)范將通過分解計(jì)算和存儲(chǔ)模塊來減少處理和帶寬阻塞點(diǎn)。
服務(wù)器規(guī)范建立在指令集架構(gòu)技術(shù)之上,例如近年來批準(zhǔn)的較新的矢量處理規(guī)范。
許多RISC-V公司正在構(gòu)建服務(wù)器芯片,其中最著名的是Ventana和Esperanto。
這些公司在基本指令集架構(gòu)之上構(gòu)建了自己的專有模塊,但表示他們將標(biāo)準(zhǔn)化為RISC-V International批準(zhǔn)的最新規(guī)格。
歐洲和美國(guó)的研究機(jī)構(gòu)正在試驗(yàn)RISC-V微服務(wù)器來開發(fā)和測(cè)試軟件。
創(chuàng)建服務(wù)器規(guī)范的提案也反映了RISC-V的開源精神——作為一個(gè)社區(qū)共同開發(fā)和改進(jìn)產(chǎn)品。
RISC-V International的首席技術(shù)官M(fèi)ark Himelstein在上個(gè)月在巴塞羅那舉行的RISC-V峰會(huì)上發(fā)表演講時(shí)說:“我們之所以是一個(gè)社區(qū)......是因?yàn)槲覀兛梢苑謸?dān)負(fù)擔(dān)?!?/span>
目標(biāo)是防止RISC-V社區(qū)中的硬件和軟件碎片化。RISC-V International希望避免Android的命運(yùn),隨著手機(jī)開發(fā)人員修改操作系統(tǒng)以滿足他們的智能手機(jī)需求,Android的命運(yùn)迅速支離破碎。
“我們分擔(dān)定義ISA的工作,我們分擔(dān)尋找硬件-軟件接口的工作......我們分擔(dān)軟件負(fù)擔(dān)。從引導(dǎo)代碼到應(yīng)用程序,它意味著一切,”Himelstein說。
RISC-V仍然不被認(rèn)為是主導(dǎo)數(shù)據(jù)中心市場(chǎng)的x86或ARM的可行服務(wù)器替代品。
“當(dāng)人們說'哦,RISC 5落后ARM10年'時(shí),答案是肯定的,但不需要10年就能趕上。世界語系統(tǒng)首席執(zhí)行官Dave Ditzel在RISC-V峰會(huì)的另一場(chǎng)演講中說:“需要幾年時(shí)間才能趕上?!?/span>
英語原文:
July 24, 2023
A specification that could standardize the development of RISC-V server chips and systems is currently being drafted by RISC-V International, an organization that is handling the development of the instruction set architecture.?
The specification establishes standard interfaces for various layers of server computing systems built on RISC-V technology. It could help companies deploy RISC-V servers in cloud computing environments, in which software runs off virtualized CPUs and not directly off hardware CPUs.
To be sure, the server spec is in its early stages. The current iteration includes system management controllers, system-on-chip modules, security layers, boot systems, and virtualization layers.
“The RISC-V server SoC (system on chip) specification defines a standardized set of capabilities that portable system software such as operating systems and hypervisors can rely on being present in a RISC-V server SoC,” RISC-V said in a document defining the specification. A link to the specification is availablehere.

RISC-V is an instruction-set architecture that is free to license. Anyone can create chips based on the architecture, but companies can also add their proprietary modules and sell those chips. RISC-V is backed by most of the top chipmakers, including Intel, AMD, Apple, Nvidia, and Qualcomm.
The Open Compute Project has also defined similar specs for x86 and ARM servers, which are used as blueprints by server makers to build standardized data-center products.
The RISC-V proposal also provides a base for server systems to support technologies like CXL, which is already backed by x86 and ARM server makers.
The upcoming CXL 3.0 spec provides a high-speed communication link between chips, memory, and storage, and is drawing interest from server hardware makers as it could change the way data centers are built. The spec will cut processing and bandwidth chokepoints by disaggregating compute and storage modules.
The server spec is built on top of technologies in the instruction set architecture such as the newer vector processing specification, which has been ratified in recent years.
Many RISC-V companies are building server chips, with the most notable being Ventana and Esperanto.?
The companies have built their own proprietary modules on top of the base instruction set architecture but have said they would standardize to the latest specs ratified by RISC-V International.
Research organizations in the Europe and U.S. are experimenting with RISC-V microservers to develop and test software.?
The proposal to create a server spec also reflects the open-source ethos of RISC-V — to jointly develop and improve a product as a community.
“The reason we’re a community at all…is we get to share the burden,” said Mark Himelstein, the chief technology officer at RISC-V International, during a recent presentation at a RISC-V Summit held last month in Barcelona.
The goal is to prevent hardware and software fragmentation in the RISC-V community. RISC-V International wants to avoid the fate of Android, which quickly fragmented as phone developers modified the OS to meet their smartphone needs.
“We share the work of defining the ISA, we share the work of finding the hardware-software interface… and we share the software burden. It means everything from boot code all the way up to applications,” Himelstein said.
RISC-V still is not considered a viable server alternative to x86 or ARM, which dominate the data center market.
“When people say ‘Oh, RISC five is 10 years behind ARM,’ the answer is yes, but it is not going to take 10 years to catch up. It will take a couple of years to catch up,” said Dave Ditzel, CEO of Esperanto Systems, during another presentation at the RISC-V Summit.
About HS-2
HS-2 RISC-V通用主板是澎峰科技與合作伙伴共同研發(fā)的一款專為開發(fā)者設(shè)計(jì)的標(biāo)準(zhǔn)mATX主板,它預(yù)裝了澎峰科技為RISC-V高性能服務(wù)器定制開發(fā)的軟件包,包括各種標(biāo)準(zhǔn)bencmark、支持V擴(kuò)展
的GCC編譯器、計(jì)算庫(kù)、中間件以及多種典型服務(wù)器應(yīng)用程序。
HS-2 RISC-V通用主板搭載了一顆國(guó)產(chǎn)RISC-V 64核處理器(SG2042)。SG2042是目前已量產(chǎn)的性能最高的RISC-V處理器,主要針對(duì)高性能計(jì)算領(lǐng)域需求設(shè)計(jì),適用于科學(xué)計(jì)算、工程計(jì)算、AI計(jì)算、融合計(jì)算等大算力應(yīng)用場(chǎng)景。

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