VIA's Glenn Henry Speaks On New Low Power Isaiah Processor

With all the buzz around VIA's recent announcement of their next generation low power Isaiah mobile processor and the parade of online coverage of the recent press event VIA held at their Centaur design center in Texas, we felt rather than regurgitating the usual marketing fluff and press pitch material, we would get together with some of VIA's top architecture and design brass in a "fireside chat" sort of venue. The idea was to provide a little more insight into what the team at VIA feels will be the real value proposition of their ultra low power Isaiah mobile X86 processor and how the product will differentiate versus current and future offerings from the likes of Intel, AMD and others. ?Our direct line of contact was with VIA's Centaur design center president, Glenn Henry. ?Former Dell CTO and IBM Engineering Fellow, Glenn founded Centaur back in 1995 and the highly successful company has the lowest employee attrition rate in the industry - no small feat for a semiconductor design house. Thanks for taking time out to chat with us today about the new Isaiah CPU architecture, Glenn. Q: ?With more than triple the number of transistors, a larger die, and potentially higher frequencies, how was Centaur able to lower Isaiah’s TDP (thermal power design) in comparison to your C7 core? ?Is the power savings a direct result of using a 65nm manufacturing process, or are there specific design elements within the core that lend themselves to power savings? Glenn Henry: ?There are many areas in the chip where we optimized the design to improve overall power consumption above and beyond what a 65nm manufacturing process brings. ?We worked on the power profile of the chip first and didn’t focus as much on increased clock speed. ?We looked at performance-per-watt and made that our priority and then tuned the design for performance. ?The new Isaiah CPU will consume only about as much power as our current C7 but offer significant performance increases of up to two times our C7 chip. Q: ?You’ve stated that Isaiah based processors are likely to outperform Intel’s upcoming Silverthorne processor. ?What is it about Isaiah that gives it this perceived advantage? ?Is there a higher IPC capability in the design versus Intel’s architecture? ?What fundamental blocks of the chip offer you a competitive advantage, in your opinion.Glenn Henry: Had I known that I would have gotten so much publicity for that statement, I may not have said it BUT, in a nutshell, we suspect Intel’s Silverthorne is an in-order processor (instruction fetch, operand dispatch, execution, and then function unit/result write). ?Isaiah is an out-of-order processor and out of order processors are just, faster. ? Isaiah is capable of three X86 instructions per clock and can execute up to 7 micro-instructions per clock with our superscalar architecture. ?They’ll (Intel) likely only be able to do 1 or 2 X86 instructions per clock. ?We also think our 1MB L2 Cache and dual 64K L1 caches going to be larger than theirs but we can’t confirm this officially obviously. ?So the big bullets are; out of order execution, a wider three-issue superscalar architecture and likely larger caches versus the other guy’s (Intel’s) chip – at least from what we think we know of their product at this point in time.

Q: ?The floating point unit in the Isaiah core seems to be a major contributing factor to its increased performance over C7. ?What are the key reasons for its relatively stronger performance? ?Do any other aspects of the Isaiah core or the system architecture significantly contribute to its increased relative performance?Glenn Henry: ? Isaiah's FPU performance is a big gain in some applications for sure. ? We’re relatively a lot faster on applications that are heavy on FPU but also lot faster than our previous product (C7) on integer operations. ?How we achieved greater FPU performance is a patentable invention. ?We came up with a new approach to doing floating-point adds and put a lot of detailed engineering work on FP multiplies. ?Centaur started working on the FPU architecture on the first day. ?It was something we didn’t do as well on the C7 but we made it a top priority on Isaiah and put a lot of focus on FPU performance. Q: Is VIA / Centaur also developing lower power, higher performing chipsets for the Isaiah architecture to further enhance the entire platform’s power and thermal characteristics? ?Glenn Henry: Yes, we can’t offer any info on the new chipsets right now but there will likely be a new chipset with the part when it launches. ?In addition, Isaiah will be compatible with our current chipsets, which will be a big advantage for our current customers in their migration efforts to Isaiah.Q: ?It is noted that the Isaiah core will have on-board hardware processing engines for security algorithms such as Random Number Generation, AES encryption and SHA secure hashing (your “Padlock” technology). ?What sort of line rate can the processor support under these conditions? Glenn Henry: We’ve had security processing and secure hashing in our products for a long time but it’s a bit difficult to translate it into CPU resource consumption. ? ?I’ll tell you this; our peak AES encryption throughput is about 20GB/sec, assuming data is available at that rate and that would consume 100% of the CPU resources. ?So as you can imagine, a single Gig-E link can be accommodated with full hardware offload in the CPU, with very low overall CPU utilization. ?Everything with our encryption and security technology is done totally in hardware, so it’s blindingly fast.

Pin Compatibility, More Capable UMPCs and Ultra-Lights

Q: ?Initial Isaiah based processors are said to be pin compatible with the C7, which will make it easy for partners to adopt them for existing designs. ?This leads us to believe a new pin-out is planned for future revisions of the core, however. ?If that is the case, can you comment on some of the new features that might come along with a new pin-out?

VP of Marketing, Richard BrownGlenn Henry: At this point we have no plans to bring out a new pin-out for the chip and there is no perceived need to take the design beyond our current footprint. ?In the future, if there’s some obvious market need, we would of course react to that.Q: ?We know mobile internet devices (MIDs), ultra mobile PCs (UMPCs), and ultra thin and light, low power notebooks will feature Isaiah based processors. ?Do you also see a new class of devices being developed to take advantage of the increased performance and power characteristics of the Isaiah architecture? ? Glenn Henry: ?You should probably talk to a few of our marketing guys on this one but personally, I don’t think we’ll see a new class of devices spring up from the introduction of Isaiah. ?However, we will make the existing laundry list of devices more functional and useful. ?Here’s a personal example. ?I have an OQO UPMC that runs Windows XP really well on our C7 processor. ?One of our Engineers here tried to install Vista on it and wasn’t happy at all with the performance. ?Vista just consumes a lot of processing power. ?I don’t want to say it’s a CPU hog (nah! why would he say that?) but this is just an example of how we’ll make current existing devices more capable and useful. ?So maybe they can process not just MPEG2 but also MPEG4 content and run Vista on these machines; stuff like that. ?Also, from our personal viewpoint, this chip will make us a lot more competitive in low-end desktops and notebooks. ?HP in China uses our C7 in a low cost desktop, for example and Isaiah will benefit them greatly by doubling their available performance.

Q: ?Can you comment on what some of the first devices to market with Isaiah based processors might look like? ?UMPCs, Notebooks, MIDs, Embedded apps?Glenn Henry: ?I can’t stress enough the huge advantage we’ll have with being able to be compatible with current, legacy C7 designs. ?I can’t confirm this but I suspect the new products coming out will look like current design wins from OQO and others, etc. ?We have lots of UMPC type design wins, thin and light notebooks and other mobile devices. ?Obviously there will be a need for BIOS updates, engineering qualification etc, but current designs can pretty much just drop Isaiah right in. ?New designs take longer to bring to market obviously, so our compatibility will definitely get Isaiah to market and available in products much faster. ?Likely our customers will offer two SKUs, one with our C7 and an upgraded, faster Isaiah-based product.Q: Roughly, what sort of battery life efficiencies can we expect from the new Isaiah core, in terms of percentages versus the C7 or even Silverthorne, if you can speculate on that? Glenn Henry: ?I don’t want to quote anything on this topic because a large component of power consumption in ultra-mobile devices isn’t tied to CPU power consumption, so it would be hard to provide accurate projections. ?However, Isaiah consumes about the same amount of power as our current C7 processor. ?Where we’ll see big benefits will be in power efficiency. ?In other words, Isaiah will have higher overall processing throughput at relatively the same power consumption. ?So in that scenario, battery life should obviously be improved. It’s too complicated to say though really. ?There aren’t very good benchmarks in this area though, so we’ll have to see how it performs in real-world applications first. ?If statistics are lies, so to speak, then quoting power statistics in this area early on would be a worse lie. ?So we don’t want to go there.

Future Process Migrations, Interview Audio Download and FAQ

Q: Do you see the Isaiah core having as long a lifecycle as the C7, which has been on the market in one form or another for many years? Glenn Henry: ?We assume it will have a very long life cycle like the C7. ?We’ve done a lot of things in the design to leave hooks for adding new features and transition to new technology. ?We have a very small design team, so we architected the chip with a lot of flexibility in mind for adding future functionality and features. Q: Any plans to manufacture the Isaiah core using more advanced process technology in the future? ?How far down do you suspect the Isaiah can be “shrunk”? ?32nm? ?Smaller?

Glenn Henry: ?Yes there are plans for a 45nm processor in the future and we’re actively working on it as we speak. ?We could technically take Isaiah to as low as fab technologies are capable. ?However, fab capitalization and costs for leading-edge fab processes are expensive. ?We won’t be on the leading edge out of principal, but will only move that way when there are obvious advantages. ? Isaiah will come in a 21x21mm BGA package that is compatible with current C7 designs. ?We’ll also be introducing a much smaller 11x11mm package for both Isaiah and C7, with a tighter ball pitch of course. ?VIA has been showcasing a business card-sized full PC on their site with that 11mm package which is obviously very tiny. ?So the processor will be available in 11x11mm BGAs with a Northbridge/Graphics/Southbridge chip a single 25x25mm BGA. ?All told, that’s not a lot of real-estate at all. Thanks very much for your time, Glenn. ?It was a pleasure. ?Good luck! Click here to hear the entire interview with Centaur Technology's Glenn Henry.

VIA Isaiah Architecture FAQ (PDF)

Glenn Henry on the Isaiah architecture

Jan 23, 2008 — by LinuxDevices Staff — from the LinuxDevices Archive— 31 views

Foreword — This informal mini-interview with Glenn Henry, president of Via's CenTaur processor division, took place a few days before the unveiling of Via's “Isaiah” architecture. Henry discusses Isaiah's technical merits, market positioning, and competitive prospects against current and future offerings from… chip giant Intel. As background, be sure to read our coverage of Via's Isaiah announcement, here.Competitive landscape

Asked to compare the first Isaiah-based chips in performance to offerings from Intel, Henry suggested performance might be comparable to single-core parts based on the Core2 architecture. He explained, “We didn't design [Isaiah] to compete with Core2. Mobile and small form-factor green devices is still our major focus. But, when you double performance, you're going to be more competitive in what you might call the 'full-size' notebook area.” As for increased competition from Intel in mobile and small form-factor devices — Via's traditional strength — Henry noted, “Silverthorne has a different architecture, different chipset [Ed. note: Silverthorne uses a “Poulsbo” companion chip, rather than standard northbridge/southbridges], different packages, different everything. They want to make sure it doesn't eat away at their main product lines. If they make it too fast or too capable, people might buy it instead of Core2 mobile parts. They've constrained performance, and constrained compatibility.” Compatibility, meanwhile, has always been a priority for Via, Henry said, explaining, “We've got to be blindingly compatible. We don't have the leverage, and we don't want to spend the money to create any new features for us, other than the PadLock [crytographic acceleration] that we've done.” Incompatibilities aside, can't Intel — one of the best-capitalized companies in the world — out-compete anyone on price? Henry doesn't think so. “Intel can afford to drop prices for a while, but they can't afford to do it in mass quantity, without losing shareholders. We'll just see. Intel's mobile pricing is very high, [because historically] AMD is not strong on low power. So, it'll be interesting to see what their pricing is with their new [Menlow] products, relative to low-end Core2 mobile parts.” Henry declined to say how Isaiah chips will be branded or priced. He commented, “We'd be crazy to talk about pricing when we haven't seen Intel's.” Henry added, “We've been with Via for eight and a half years, and we've survived every price attack, we've survived patent attacks, and we're still in business. We sort of think we understand how to survive. We're alive in our 13th year because we have the lowest-cost structure, lowest-cost parts, lowest-cost package, our testing is inexpensive — my cost [designing our processors] is almost negligible compared to anyone else's.” “I'm proud of the team here. We did this new architecture and first chip with a company of less than 100 people, including lots of testers and support people. Intel's process is also very good, but since when has product cost been a key factor in their market?” And what of the fallen foes in Intel's wake, such as Transmeta and Cyrix? Henry said, “Transmeta was doomed to start with. Their die was too big, their power approach was over-hyped, and they had grotesque incompatibility. Then, they were incredibly bloated. I used to joke that they had more VPs than we had people. They certainly had more managers than we had people.” “Cyrix had a good product, but they got bought by a 'big smokestack' company and they got bloated. When Via bought Cyrix, they had 400, and we had 60, and we were turning out more product.”Design goals behind Isaiah

Henry was happy to talk about his design goals for Isaiah. “The goal when we started was not to leave the low-power world, but to bring more performance at the same power. We double or tripled performance with the same power consumption, and that's really hard to do. We've also added a VM architecture and 64-bit support, not because we need them today, but because history says they'll be needed tomorrow.” “It's no secret that the C7 is not terribly good at floating-point computation. So, we put a lot of thought into that. If you look at the timings at the instruction level, [our floating point unit] is faster than anybody else's. We actually have some major inventions there. We can do four single-precision adds and four single-precision multiplies in a single cycle. “Our 64-bit architecture is Intel's. Intel's first 64-bit implementation was an add-on, and not very good. But now, Intel's is the same as AMD, and they implement it well. The differences between AMD and Intel [64-bit support] are trivial. “Our VM architecture is VTX. Read the Intel VTX spec, and that's our spec. We prove it by running off the shelf software — VMWare, and others. “64-bit support was relatively easy. The VM stuff is a lot more complicated. You've got the world's ugliest instruction set, and now you're going to virtualize it, so you have ugly squared.” By “ugly,” Henry is referring to the many “weird optimizations” in x86 resulting from the days when transistors were “expensive” — that is, a very limited resource. For example, X86 instructions must be “decoded” into micro-ops before being executed. Ugliness aside, Henry has long been a firm believer in x86. He recalls, “I was an IBM fellow, and I moved into the PC group there in '84 or '85. So, I started at IBM on x86 at the same time they were doing PowerPC. Everyone thought I was crazy, saying 'Look at our beautiful architecture!' But now look at the ratio of x86 to PowerPC. I could see [the role personal computers were to play]. Look at the ratio of x86 to PowerPC today. Software begets more software, and who really cares what instruction set is underneath it, as long as it works?” Henry adds, “Alpha went out, PA-RISC went out, and there's a steady stream of RISC architectures withering on the vine every year.”What's ahead for Isaiah?

And so, what's next for the Isaiah architecture, longer-term? Will the part's interesting cache architecture work okay in multi-core designs, for example? Henry replied, “Isaiah has been architected to be multi-core. Our L2 is exclusive, rather than inclusive, but there's nothing weird about that for a dual-core. Data can still be shared, and can be available to either processor. Either L1 can push data into L2. We chose not to do a dual-core in the first parts, though. Why double the heat, double the transistors, and double the cost, when most of the customers don't need the performance of multicore? But dual-core has been thought about a lot, and it's a matter of when.” In the nearer term, the focus will be on refining Isaiah, now that first silicon is in hand. Henry observed, from long experience, “Every architecture that comes out, you can improve performance 20 percent [in the first revision]. Then 10 percent, then five percent. No matter how much you model, analyze, study traces, and so on, once you have silicon you're “infinitely wiser” — I think that's the technical term I use in my architecture paper. “We are already at work making the straightforward changes. There are millions of sizes to balance. 'How big is this buffer? How big is this FIFO?' A lot of the tuning is straightforward. 'We have two integer units, but maybe we should have three?' Those changes are easy to do once the basic structure is in place.” “This is a starting point, rather than an end point,” he concluded. Readers with good comprehension of processor micro-architecture terms are encouraged to read Henry's in-depth technical whitepaper on the Isaiah architecture, available for download here. This article was originally published on LinuxDevices.com and has been donated to the open source community by QuinStreet Inc. Please visit LinuxToday.com for up-to-date news and articles about Linux and open source.

Via launches 64-bit architecture

Jan 23, 2008 — by LinuxDevices Staff — from the LinuxDevices Archive— 3 views

Via has unveiled a 64-bit, VM-enabled x86-compatible architecture expected to debut this spring in pin-compatible chips targeting green PCs, home servers, and mobile devices. Chips based on the “Isaiah” architecture promise to outperform Via's current C7/Eden chips two-to-three times, within the same power… envelope.(Click for larger view of an Isaiah wafer)Via has no plans to discontinue its C7 and Eden chip lines, which are based on the Esther architecture. Instead, initial Isaiah-based chips will add a higher performance but pin-compatible option, at a higher price-point. This approach will let customers address a wide range of price and performance points with a single design, Via suggests. Through the years, Via has had an excellent track record for delivering new processors at regular intervals. Its Austin, Tex. based CenTaur chip unit claims to have delivered approximately seven major chip designs since being acquired by Via in mid-1999. However, Isaiah is a little bit behind schedule, having been first announced in 2004, with an original target delivery date in 2006. Initial Isaiah-based chips will be built on 65 nanometer process technology. They will clock to 2GHz, Via expects, and offer FSB speeds from 800MHz to 1333MHz. They will have 64KB each of L1 instruction and data cache, and 1MB of exclusive L2 cache with 16-way associativity. Additionally, Isaiah chips will feature the “world's fastest” (relative to clockspeed) floating-point unit, addressing an area of traditional weakness in Via chips — multimedia computation.

Isaiah function block diagram and die plot(Click either to enlarge) Isaiah's superscalar, speculative out-of-order microarchitecture invites comparison with the Core2 micro-architecture used across Intel's line of mobile, desktop, and server chips. Additionally, Isaiah's 64-bit support is compatible with Intel's, while its virtual machine (VM) architecture is compatible with Intel's VTX, which Via has licensed. There are differences, though. Core2's L2 cache is inclusive, and Core2 has smaller L2 caches. Intel, meanwhile, expects to move down-market with its Silverthorne processor, also expected to debut this spring. Silverthorne uses an in-order architecture, much like Via's Esther architecture, and targets the same mobile and consumer markets where Via has achieved much of its success to date.

So, how will the competition shape up, and what's Isaiah all about? We asked this and other questions of Glenn Henry (pictured), the IBM fellow who leads CenTaur. Click below to read our interview with Henry.Glenn Henry on the Isaiah architecture This article was originally published on LinuxDevices.com and has been donated to the open source community by QuinStreet Inc. Please visit LinuxToday.com for up-to-date news and articles about Linux and open source.