原文：RISC-V Finds Its Foothold in a Rapidly Evolving Processor Ecosystem作者：Agam Shah

轉載自：https://thenewstack.io/risc-v-finds-its-foothold-in-a-rapidly-evolving-processor-ecosystem/

以下是正文

But the open source processor architecture will need to find more support from the software dev community before it can rival x86 and ARM architectures in the data center: A wrap-up of RISC-V Summit in Barcelona.

但是開源處理器架構需要從軟件開發(fā)社區(qū)獲得更多支持，然后才能在數(shù)據(jù)中心與x86和ARM架構競爭：巴塞羅那RISC-V峰會的總結。

Developers have grown up hearing ARM or x86 being the guts of PCs and servers, but an alternative architecture called?RISC-V?is emerging.

開發(fā)人員聽說ARM或x86是PC和服務器的內臟，但一種名為RISC-V的替代架構正在出現(xiàn)。

In the next?few years, some companies will inevitably ship PCs and servers running on RISC-V processors. Those systems will likely run on Linux as Microsoft is not known to be developing a Windows OS for the architecture.

在接下來的幾年里，一些公司將不可避免地出貨運行在RISC-V處理器上的PC和服務器。這些系統(tǒng)可能會在Linux上運行，因為不知道Microsoft正在為該架構開發(fā)Windows操作系統(tǒng)。

But there are big problems with the software ecosystem — the developer support is pitiful.?RISC-V International, which is developing the chip architecture, talks more about hardware, with software a distant second in priorities.

但是軟件生態(tài)系統(tǒng)存在很大的問題——開發(fā)人員的支持是可憐的。正在開發(fā)芯片架構的RISC-V International更多地談論硬件，軟件在優(yōu)先級上遙遙領先。

Initial Support

Since its emergence close to a decade ago, RISC-V?quickly gained?the support of major chip makers, including Apple, which has put controllers in its Apple Silicon. About 10 billion chip cores based on RISC-V have shipped. Most recently, Meta?announced?an AI inferencing chip built on RISC-V architecture.

自近十年前出現(xiàn)以來，RISC-V迅速獲得了主要芯片制造商的支持，包括蘋果公司，蘋果公司已將控制器置于其蘋果硅中?；赗ISC-V的芯片內核已經出貨了大約10億個。最近，Meta 宣布推出一款基于 RISC-V 架構的 AI 推理芯片。

The chip architecture is often called a?hardware equivalent?of Linux. It is a free chip technology built on a contributor culture and the ethos of open source, in which a community works together to develop and improve the product.

芯片架構通常被稱為Linux的硬件等價物。它是一種建立在貢獻者文化和開源精神之上的免費芯片技術，其中社區(qū)共同努力開發(fā)和改進產品。

RISC-V is a free-to-license architecture, which means anyone can fork a version of the architecture into their own chip.

RISC-V是一種免費許可的架構，這意味著任何人都可以將架構的一個版本分叉到自己的芯片中。

Chips with RISC-V can be compiled like Lego blocks — companies that take the base architecture, and top it off with proprietary hardware blocks that may include accelerators for AI, graphics, or security.

帶有RISC-V的芯片可以像樂高積木一樣編譯 - 采用基本架構的公司，并使用專有硬件塊進行編譯，這些硬件模塊可能包括用于AI，圖形或安全的加速器。

“What was once an experiment, a prototype, is quickly moving into production,” said?Calista Redmond, during a keynote at last month’s RISC-V Summit in Barcelona.

“曾經是一個實驗，一個原型，正在迅速投入生產，”Calista Redmond在上個月在巴塞羅那舉行的RISC-V峰會上發(fā)表主題演講時說。

The structure of RISC-V makes it suitable for cloud native environments handling diverse applications and complex computing requirements.

RISC-V的結構使其適用于處理各種應用程序和復雜計算需求的云原生環(huán)境。

The minimal base instructions are designed to quickly offload applications such as AI and analytics to accelerators like GPUs or specialized math processors, which excel at such tasks.

最小基本指令旨在將 AI 和分析等應用程序快速卸載到 GPU 或專用數(shù)學處理器等加速器，這些加速器擅長此類任務。

Chips from Intel and AMD are reaching their physical limits, and the?flexibility of RISC-V?provides a structure to move computing into the future.

英特爾和AMD的芯片正在達到其物理極限，RISC-V的靈活性提供了一種將計算推向未來的結構。

For example, RISC-V provides a pathway for new hardware architectures such as sparse computing, which is being researched by the Intelligence Advanced Research Projects Activity, in which processing units are closer to the data in storage or memory.

例如，RISC-V為稀疏計算等新硬件架構提供了一條途徑，該架構正在由智能高級研究項目活動進行研究，其中處理單元更接近存儲或內存中的數(shù)據(jù)。

The Barcelona Supercomputing Centre proposed the concept of merging CPU and memory in a RISC-V chip, which will reduce the memory bottleneck posed by machine-learning applications.

巴塞羅那超級計算中心提出了將CPU和內存合并到RISC-V芯片中的概念，這將減少機器學習應用程序帶來的內存瓶頸。

“What we want from it — it is actually to do memory-intensive operations close to memory, like memcpy,” said?Umair Riaz, a researcher at BSC, referring to the C++ function to copy memory blocks. Riaz also referenced the spinlock function, and mentioned the CPU executing those in memory will be more efficient and faster.

“我們想要從中得到的 - 它實際上是在內存附近進行內存密集型操作，就像memcpy一樣，”BSC的研究員Umair Riaz說，他指的是復制內存塊的C++功能。Riaz還提到了自旋鎖函數(shù)，并提到在內存中執(zhí)行這些函數(shù)的CPU將更高效，更快。

“Executing functions locally you will eventually get performance and less [network] traffic because you are doing much more closer to memory,” Riaz said.

“在本地執(zhí)行功能，你最終將獲得性能和更少的[網絡]流量，因為你做得更接近內存，”Riaz說。

Writing applications for such complicated RISC-V chips may be a load for even the bravest programmers that want to code directly to the hardware. But Intel wants to provide the tooling needed for coders to start testing applications in simulated RISC-V environments.

為如此復雜的RISC-V芯片編寫應用程序對于想要直接對硬件進行編碼的最勇敢的程序員來說也可能是一種負擔。但英特爾希望提供編碼人員在模擬RISC-V環(huán)境中開始測試應用程序所需的工具。

OneAPI

Intel’s Codeplay software unit recently announced the?OneAPI Construction Kit, which includes tools for developers to test code in a simulated RISC-V environment on x86 PCs.

英特爾的Codeplay軟件部門最近發(fā)布了OneAPI構建套件，其中包括供開發(fā)人員在x86 PC上的模擬RISC-V環(huán)境中測試代碼的工具。

The Construction Kit’s signature feature is support for SYCL — which allows coders to write and compile applications regardless of the hardware architecture — and Intel is taking the first steps to bring RISC-V support to the parallel-programming framework.

該構建套件的標志性功能是支持 SYCL，它允許編碼人員編寫和編譯應用程序，而不管硬件架構如何，英特爾正在邁出第一步，將 RISC-V 支持引入并行編程框架。

The kit includes support for Intel’s DPC++/C++ Compiler, which allows C++ code to be recompiled for use across multiple hardware architectures.

該套件包括對英特爾 DPC++/C++ 編譯器的支持，該編譯器允許重新編譯C++代碼以跨多個硬件架構使用。

Developers can also test RISC-V code on Raspberry Pi-like developer boards or systems from companies such as?Milk-V, and?StarFive. Both companies offer high-performance 64-bit RISC-V systems with support for Linux.

開發(fā)人員還可以在類似Raspberry Pi的開發(fā)板或Milk-V和StarFive等公司的系統(tǒng)上測試RISC-V代碼。兩家公司都提供支持Linux的高性能64位RISC-V系統(tǒng)。

Support for Linux tools on?RISC-V?are tepid. Only a handful of packages are fully supported, and that includes Ubuntu OS, Gnu Toolchain, OpenvSwitch, Apache Nuttx, and Spidermonkey for Mozilla.

RISC-V上對Linux工具的支持不溫不火。只有少數(shù)軟件包完全支持，其中包括Ubuntu OS，Gnu Toolchain，OpenvSwitch，Apache Nuttx和Mozilla的Spidermonkey。

Many packages for RISC-V will work reasonably well, but are still not fully supported. For example, the RISC-V developer community in China reported that more than 80% of the packages in open source Fedora are now supported on RISC-V,

RISC-V的許多軟件包可以很好地工作，但仍然沒有完全支持。例如，中國的RISC-V開發(fā)者社區(qū)報告說，開源Fedora中超過80%的軟件包現(xiàn)在在RISC-V上得到了支持。

Some key packages, such as Pytorch, GCC, TensorFlow, and OpenJDK will work, but are not yet fully supported. Support for open source applications like LibreOffice and Firefox are being built up. Google is accelerating its support of AOSP (Android Open Source Project) on RISC-V, which will be a big part of the next architecture specification.

一些關鍵包，如Pytorch，GCC，TensorFlow和OpenJDK可以工作，但尚未完全支持。對LibreOffice和Firefox等開源應用程序的支持正在建立中。谷歌正在加速在RISC-V上支持AOSP（Android開源項目），這將是下一個架構規(guī)范的重要組成部分。

RISC-V server chip makers?Esperanto Technologies?and?Ventana Micro Systems?have announced server chips for cloud computing, but have not talked much about software support or programming models. Esperanto has ported Meta’s Open Pre-Trained Transformer model to its RISC-V server.

RISC-V服務器芯片制造商Esperanto Technologies和Ventana Micro Systems已經宣布了用于云計算的服務器芯片，但沒有過多談論軟件支持或編程模型。Esperanto 已將 Meta 的開放預訓練變壓器模型移植到其 RISC-V 服務器上。

RISC-V International, which is developing the architectural spec, is trying to solve that problem with the establishment of the RISC-V Software Ecosystem, also called RISE, to create the underlying software tools and middleware for RISC-V systems. The initial backers include companies such as Google, Intel, Nvidia, Qualcomm, Samsung, and Ventana.

正在開發(fā)架構規(guī)范的RISC-V國際公司正試圖通過建立RISC-V軟件生態(tài)系統(tǒng)（也稱為RISE）來解決這個問題，為RISC-V系統(tǒng)創(chuàng)建底層軟件工具和中間件。最初的支持者包括谷歌、英特爾、英偉達、高通、三星和文塔納等公司。

Mark Himelstein, chief technology officer RISC-V International, at the summit talked about RISC-V taking a page from the cultural roots of Linux culture, with contributors contributing to the shared interests.

RISC-V International首席技術官Mark Himelstein在峰會上談到了RISC-V從Linux文化的文化根源出發(fā)，貢獻者為共同的利益做出了貢獻。

“That contributor culture means upstreaming on RISC-V and other communities where open source and open standards play a part,” Himelstein said, adding “that does not mean you are working on the pieces of the puzzle that are rapidly commoditizing.”

“這種貢獻者文化意味著在RISC-V和其他開源和開放標準發(fā)揮作用的社區(qū)上游，”Himelstein說，并補充說，“這并不意味著你正在研究正在迅速商品化的拼圖。

There is also no structure for hardware and software co-design that makes it easier for coders to use x86 and ARM systems. RISC-V first develops a hardware spec and Linux compatibility comes later. That is very different than Intel, which upstreams Linux drivers for a chip before it is released, which ensures the hardware is compatible with the latest build of the OS.

硬件和軟件協(xié)同設計也沒有結構，使編碼人員更容易使用 x86 和 ARM 系統(tǒng)。RISC-V首先開發(fā)硬件規(guī)范，Linux兼容性稍后出現(xiàn)。這與英特爾非常不同，英特爾在芯片發(fā)布之前上游Linux驅動程序，確保硬件與最新版本的操作系統(tǒng)兼容。

China, Tho

RISC-V’s software efforts also lack a force of nature like Linus Torvalds that can drive a project forward by sheer will. RISC-V also is not mainstream enough to attract an army of developers.

RISC-V的軟件工作也缺乏像Linus Torvalds那樣的自然力量，這種力量可以通過純粹的意志推動項目向前發(fā)展。RISC-V也不夠主流，無法吸引大量開發(fā)人員。

But it is a different scene with China, which is adopting RISC-V on a massive scale to create homegrown chips and reduce its reliance on Western technology. Developers in China are rolling up their sleeves and contributing coding to stand-up RISC-V compatible operating systems for Linux.

但與中國的情況不同，中國正在大規(guī)模采用RISC-V來制造本土芯片并減少對西方技術的依賴。中國的開發(fā)人員正在卷起袖子，為Linux的RISC-V兼容操作系統(tǒng)貢獻編碼。

Their motivation is simple — an engineering focus is driving China’s?RISC-V initiative, not politics, and there is plenty of motivation for developers to build OS support, especially with the latest Western chip technology out of sight due to export restrictions.

他們的動機很簡單——工程重點正在推動中國的RISC-V計劃，而不是政治，開發(fā)人員有足夠的動力來構建操作系統(tǒng)支持，尤其是在由于出口限制而看不到最新的西方芯片技術的情況下。

Chinese companies are developing some of the most sophisticated RISC-V chips, and the community is adding support for more packages daily. Many of the core contributors to Fedora,?Debian, Gentoo and Arch Linux, GNU toolchain, and Clang are in China.

中國公司正在開發(fā)一些最先進的RISC-V芯片，社區(qū)每天都在增加對更多封裝的支持。Fedora、Debian、Gentoo 和 Arch Linux、GNU 工具鏈和 Clang 的許多核心貢獻者都在中國。

The RISC-V community in China is also leading a grassroots effort to bring support for ROCm — which is AMD’s parallel-programming framework — to RISC-V processors. AMD did not respond to requests for comment on whether it was involved in porting ROCm to RISC-V.

中國的RISC-V社區(qū)也在領導一項基層工作，將ROCm（AMD的并行編程框架）的支持引入RISC-V處理器。AMD沒有回應有關其是否參與將ROCm移植到RISC-V的評論請求。

正文完

• About HS-2

HS-2 RISC-V通用主板是澎峰科技與合作伙伴共同研發(fā)的一款專為開發(fā)者設計的標準mATX主板，它預裝了澎峰科技為RISC-V高性能服務器定制開發(fā)的軟件包，包括各種標準bencmark、支持V擴展的GCC編譯器、計算庫、中間件以及多種典型服務器應用程序。

HS-2 RISC-V通用主板搭載了一顆國產RISC-V 64核處理器（SG2042）。SG2042是目前已量產的性能最高的RISC-V處理器，主要針對高性能計算領域需求設計，適用于科學計算、工程計算、AI計算、融合計算等大算力應用場景。

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